Extreme ultraviolet (EUV) lithography is a leading candidate for the next-generation lithographic solution. The optical irradiation wavelength for the EUV lithography is 13.5 nm. The prototypes operational in the field have demonstrated the feasibility of fabricating 32- and 22-nm node devices. A particular challenge in the EUV lithography is flare (also called stray light or scattered light) modeling and compensation. The flare is incoherent light that does not follow the normal optical path. When a light ray is incident upon a surface, it is reflected off the surface as a light ray in an ideal situation. The roughness of the surface, however, can produce additional light rays through light scattering in addition to the reflected light ray. These additional light rays are called flare. In lithography, the flare may be caused by the roughness of lens/mirror surface finish, non-ideal anti-reflection coatings, and dust (or contamination) on the optics. The unwanted flare can degrade image quality and eventually lithographic performances such as control of critical dimension (CD) of printed features and the process window. The flare problems are more serious in the EUV lithography than in the deep ultraviolet (DUV) lithography in which the shortest wavelength is 193 nm because the nature of flare is light scattering and the light scattering is proportional to 1/λ2 (λ is the light wavelength).
Besides the 1/λ2 dependence, the flare has a long-range effect even though it can also affect the control of CD on a nanometer scale. This long-range effect dictates that layout features over a millimeter range should be considered for modeling and correcting flare effects. By contrast, traditional OPC (optical proximity correction) tools focus on layout features within a distance comparable to the light diffraction range which is only a few times of the light wavelength. It is thus not straightforward to compensate for the long-range flare effect in an OPC process.
In semiconductor device fabrication, an array of identical circuits is often fabricated on a wafer. It would be preferable to be able to apply the OPC result for one representative circuit to the other circuits in the array. One of the main concerns for such an approach is these identical circuits have different flare intensities. Fortunately, the flare intensity difference (flare difference) for many of the identical circuits may not be significant enough to warrant an additional OPC process. Even for circuits on which the flare is significantly different from that on the representative circuit, the flare difference may be significant only in some particular regions of these circuits. It is therefore desirable to search for methods that can determine those particular regions with intolerable flare difference (intolerable flare difference regions) and conduct additional OPC only on them.